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        LPC1767

        芯片信息

        型號 封裝 在線定購
        LPC1767FBD100(查看) LQFP100

        引腳布局

        (點擊圖片看大圖)
        技術資料—— LPC1767 PDF技術資料
        LPC1767 參數
        LPC1767 存儲器
        Flash (KB) 512
        RAM (kB) 64
        LPC1767 其他參數
        fmax (MHz) 100
        I/Opins 70
        UART 4
        I2C 3
        I2S 1
        SPI 2
        SSP 2
        ADC 8
        DAC 1
        定時器 6
        PWM 6
        I/O 電壓 (V) 3.3
        CPU 電壓 (V) 3.3
        LPC1767 封裝與引腳
        LQFP100

        LPC1767 概述

        The LPC1767 are ARM Cortex-M3 based microcontrollers for embedded applications featuring a high level of integration and low power consumption. The ARM Cortex-M3 is a next generation core that offers system enhancements such as enhanced debug features and a higher level of support block integration

        The LPC1767 operate at CPU frequencies of up to 100 MHz. The ARM Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals. The ARM Cortex-M3 CPU also includes an internal prefetch unit that supports speculative branching

        LPC1767 特性

        • ARM Cortex-M3 processor, running at frequencies of up to 100 MHz
        • ARM Cortex-M3 built-in Nested Vectored Interrupt Controller (NVIC)
        • Up to 512 kB on-chip flash programming memory
        • Up to 64 kB of SRAM
        • In-System Programming (ISP) and In-Application Programming (IAP)
        • Eight channel General Purpose DMA controller (GPDMA)
        • Ethernet MAC with RMII interface and dedicated DMA controller
        • Four UARTs with fractional baud rate generation, internal FIFO, and DMA support
        • SPI controller with synchronous, serial, full duplex communication
        • Two SSP controllers with FIFO and multi-protocol capabilities
        • Three enhanced I2C bus interfaces
        • I2S (Inter-IC Sound) interface
        • 70 General Purpose I/O (GPIO) pins with configurable pull-up/down resistors
        • 12-bit/8-ch Analog/Digital Converter (ADC) with conversion rates up to 200 kHz
        • 10-bit Digital-to-Analog Converter (DAC)
        • Four general purpose timers/counters
        • One motor control PWM with support for three-phase motor control
        • Quadrature encoder interface that can monitor one external quadrature encoder
        • One standard PWM/timer block with external count input
        • Low power RTC with a separate power domain and dedicated oscillator
        • WatchDog Timer (WDT)
        • ARM Cortex-M3 system tick timer, including an external clock input option
        • Repetitive interrupt timer provides programmable and repeating timed interrupts
        • Each peripheral has its own clock divider for further power savings
        • Standard JTAG test/debug interface
        • Integrated PMU (Power Management Unit)
        • Four reduced power modes: Sleep, Deep-sleep, Power-down, and Deep power-down
        • Single 3.3 V power supply (2.4 V to 3.6 V)
        • Four external interrupt inputs configurable as edge/level sensitive



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